1. Field of the Invention
This invention relates to memory circuits, and more particularly, to controlling leakage in memory circuits.
2. Description of the Related Art
Static random access memory (SRAM) is used in a wide variety of applications. Such applications include cache memories, registers files, buffers, and so forth. Unlike its dynamic RAM (DRAM) counterpart, an SRAM does not require a periodic refresh to maintain its contents. Nevertheless, SRAMs are subject to leakage currents.
SRAM may be implemented using a plurality of memory cells, each of which is configured to store a bit of information. Each memory cell may include a plurality of transistors. Various ones of the transistors of a given memory cell may be active (i.e. turned on) in order to store a bit of information, while others may be inactive (i.e. turned off). However, the inactive transistors may still be subject to leakage currents between their respective drain and source nodes. Despite such leakage currents, the cells of an SRAM will typically maintain their contents as long as power is applied. However, applying constant power to the cells of an SRAM array may adversely affect overall power consumption.